Xilinx Serial Flash Loader Device
Styx is an easy to use Zynq Development Module featuring Zynq ZC7020 SoC from Xilinx with FTDI’s FT2232H Dual Channel USB Device. Zynq series of integrated circuits from Xilinx feature a hard System on Chip (SoC) with ARM core and numerous peripherals including UART, SPI, I2C, Dual Gigabit Ethernet, SDIO etc. Apart from the complete SoC, the Zynq also features an FPGA die equivalent to Xilinx Series-7 devices. It is specifically designed for development and integration of FPGA based accelerated features in to other larger designs. Styx is pin compatible with, as well as and thus offers seamless upgrade path. The high speed USB 2.0 interface provides fast and easy configuration download to the on-board SPI flash. No programmer or special down loader cable is needed to download the bit stream to the board.
The second FTDI channel can be used to develop custom high data-rate USB based applications. Styx provides users flexibility in adding their own peripherals through IO Expansion Headers. Pin compatible with, and and offers seamless upgrade path. Device: XC7Z020 in CLG484 package, Speed Grade: -1. DDR3: 2Gb DDR3 (MT41J128M16HA-125:K or equivalant). Flash memory: 128 Mb Quad bit SPI flash memory (N25Q128A13EF840E). 33.33 MHz CMOS oscillator. High Speed USB 2.0 interface for On-board flash programming.
FT2232H Channel A is dedicated for SPI Flash /JTAG Programming. Channel B can be used for custom applications. On-board voltage regulators for single power rail operation.
Flash programming via JTAG and USB. Maximum IOs for user defined purposes. FPGA – 150 IOs. FT2232H – 8 IOs. By default the board is configured to use +5V supply from USB.
So an external power is not required unless USB port is unable to supply enough current. USB 2.0 ports are only capable of providing enough current for the module for small designs which require less power. Current requirement for this board largely depends on your application. Please consult FPGA data sheet for more details on power requirements. If for any reason, an external power supply needs to be used for the board, the Power select jumper should be configured properly before connecting the power supply. Please refer to the marking on the board for more details. External power supply should be in the range of +5 to +12V, with sufficient current rating.
Channel A of FT2232H can be either connected to the SPI bus or JTAG by using on-board jumpers. By connecting SPI bus to FT2232H channel A, the SPI flash can be directly programmed to save the configuration permanently. This is the default configuration set when Styx is shipped. When FT2232H channel A is connected to SPI, Styx Configuration Downloader utility can be used to program the board. When FT2232H channel A is connected to FPGA JTAG, the JTAG signals can be accessed directly through FT2232H. Styx Configuration Downloader utility currently does not support programming FPGA SRAM through JTAG. Please see the tables below for information about selecting SPI or JTAG for FT2232H channel A.
SPI must be selected for Styx Configuration Downloader utility to work. Solder Jumpers P2 Jumper Configuration for SPI Jumper Configuration for JTAG 1 - 2 2 - 4 5 - 6 3 - 5 Solder Jumpers P3 Jumper Configuration for SPI Jumper Configuration for JTAG 1 - 2 2 - 4 5 - 6 3 - 5. On The Header Zynq-7020 (CLG484) Pin No. On The Header Zynq-7020 (CLG484) Pin No. On The Header Zynq-7020 (CLG484) Pin No. On The Header Zynq-7020 (CLG484) Pin No.
Styx is factory configured to be powered directly from USB port so make sure that you are using a USB port that can power the board properly. It is recommended to connect the board directly to the PC instead of using a hub. It is practically very difficult to estimate the power consumption of the board, as it depends heavily on your design and the clock used.
XILINX provides tools to estimate the power consumption. In any case if power from USB is not enough for your application, external supply can be applied to the board. Jumper P7 should be set up properly (short pin 1-2) to use the board on external power. Styx requires five different voltages, a 3.3V, a 1.8V, a 1.0V, a 0.75V supplies and a 1.5V supply.
On-board regulators derive these voltages from the USB/Ext power supply. Styx has an on-board FTDI FT2232 device which facilitates easy reprogramming of on-board SPI flash through USB interface. The FTDI receives bit stream from the host application and programs it in to the SPI Flash and lets the Zynq boot from the SPI flash. The Styx configuration application can be downloaded from www.numato.com for free. Step 1: Open Styx Configuration Tool. Click “Scan for Devices” if “Styx Zynq Module” is not detected automatically.
Step 2: Click on “Load Binary File”. Select the “.bin” file and then click on “Program Flash” button. Wait till “Programming Completed” appears on the screen.
Hello, I am using a microblazed based FPGA design on a customized FPGA platform where I do not have a spi flash. I have only DDR3. I have a SDK application that can be run from bram bootloader If I will optimize. Please let me know the steps to create an autolaunch.elf that can be associated with.bit file. So that after downloading the bitstream (through JTAG or through a nand flash MCS that is controlled by the ARM) the application could start automatically from bram controller. My application includes the uart console. I tried to associate the current.elf but it did not work.
Thanks for anyhelp. Regards, Vaibhav. Thanks for your reply. Yes I have jtag and normally I debug using SDK. But, for the final product, the fpga will be programmed by the arm through the.mcs stored in a nand flash.
FPGA does not has a direct SPI flash. But I have a mean to program through flash. Hence I want to associate applicaiton.elf with system.bit in order to create.mcs so that after fpga will be programmed the application should start it self unlike SDK there we have to download the.elf over jtag. Hence, in order to make a bootloader that could start my application in autorun mode from bram controller what steps I need to follow. Highly appreciate your help. Best regards, Vaibhav.
Xilinx Serial Flash Loader Devices
I found a solution. Actually my application is small enough to fit in to bram hence I do not need to create a bootloader in order to copy the files to ddr3 for execution. Normally, it should work if the application.elf is associated using Vivado and the flash is programmed with the.mcs created using writecfgmem tcl command.
Or using Impact. But the problem is, with the bistream generated by vivado after associating.elf works when I download it using jtag. But, when I convert it to.mcs and program the flash either impact/vivado hardware manager and start the board over UART@9600 I see bist bitstream running because it gives me a test menu for uart ethernet etc.
Actually, I am expecting a uart@115200 as it is set at UART ip. I am unable to understand from where it is included in.mcs in Vivado. Because, if I simply download the systemtop.bit using jtag, it gives me the expected console over UART@115200. I am unable to understand if it is a bug or what?